The invention relates to a junction field effect transistor and, more particularly, a junction vertical channel field effect transistor with channels vertically formed in the thickness of the transistor substrate.
A junction field effect transistor of the type in which channels are formed vertically in the thickness of the substrate of the transistor, is known as a junction vertical channel field effect transistor.
Reference is made to FIG. 1 illustrating a known junction vertical channel field effect transistor in cross section. An N.sup.+ type silicon substrate 11 with high impurity concentration is provided thereon with an N.sup.- type layer 12 of low impurity concentration. The substrate 11 forms a drain region. A net shaped P.sup.+ type region 13 with high impurity concentration is embedded in the N.sup.- type layer 12. An N.sup.+ type region 14 with high impurity concentration is formed in the surface region of the layer 12. The region 14 forms a source region. The N.sup.+ type substrate 11 is provided with a drain electrode 15. The N.sup.+ type region 14 is provided with a source electrode 16. A gate electrode 18 is related to the region 13 through a P+ type region 17 with high impurity concentration. An insulation layer is designated by reference numeral 19, which is made of silicon, for example.
The junction vertical channel field effect transistor with such a construction above mentioned has an output current to output voltage characteristic like that of a triode vacuum tube. That is, the amount of current flowing from the drain region 11 into the source region 14 may be controlled by changing the potential of the gate region 13. This type field effect transistor has a disadvantage that the gate resistance is high and when it is used in high frequencies, the power gain and the power output is small.
For avoiding this defect, the gate region 13 is disposed in the vicinity of the surface of the layer 12 and connected directly to the gate electrode 18, unlike the FIG. 1 case in which the gate region 13 is connected to the gate electrode 18 through the embedded contacting region 17. With such a connection, the gate resistance is small so that the power output and the power gain are large. Accordingly, it is more suitable for high frequency transistors than the FIG. 1 transistor.
In such the direct-connection type field effect transistor, the impurity concentration of the N type layer is generally less than 0.1.times.10.sup.16 cm.sup.-3 (the resistivity is more than 4 ohm.multidot.cm) and its output current-output voltage characteristic is as shown in FIG. 2. The characteristic curves include super-linear curves (downwardly curved) of non-saturation characteristic (the drain currents increase infinitely with increase of the drain voltage), just like triode characteristic. However, its drain efficiency is not so high and it is unsatisfactory as a high frequency transistor. Incidentally, the drain efficiency is the ratio of the power output to the product of the drain voltage and the drain current. This is a very important factor expressing the function of the high frequency power active element. In FIG. 2, V.sub.g is a gate voltage.